Job Description: DFT Lead / Manager
At Scale Flux, we are a family unit powered by diversity, inclusion, transparency, respect,
integrity, and passion—for both our clients and our people. Our business growth depends on
your professional development, as we collaborate, share ideas and innovations, and invest in
our future. By forging meaningful partnerships with our people, we come together with a
shared purpose, exceeding our goals. This keeps us nimble, ahead of the competition, and at
the forefront of our industry. Our continued success begins with you.
Scale Flux helps customers harness data growth as a competitive advantage by building
products that reduce complexity and accelerate the creation of value from data. In our first
phase of rethinking the data pipeline for the modern data center, Scale Flux built a better SSD
by embedding computational storage technology into flash drives. Now, customers can gain
an edge by deploying storage intelligence to optimize their data center infrastructure for
workloads like databases, analytics, Io T, and 5 G.
Roles and Responsibilities:
∙In Depth knowledge of overall DFT concepts including Analog IP block testing.
∙Extensive experience in DFT Insertion which includes SCAN, MBIST, BSCAN,
IJTAG.
∙Well versed with RTL level or Netlist level Insertion (Block level/Top level).
∙ATPG Coverage Analysis and improvement.
∙Hands on experience in DFT verification.
∙Efficient debugging skills, Excellent problem-solving skills.
∙Knowledge of equivalence check and RTL lint tool (like spyglass).
∙Ability to do multi-tasking & work on several high priority designs in parallel.
∙Good communication skills and ability to work with cross functional teams.
∙Working Experience with ATE Pattern Development and ATE support
Location : Bangalore and Pune
Qualifications and Skill set
∙BE/BS degree (Masters preferred) in Electrical/Electronics/VLSI Engineering with
10+ years of relevant DFT experience
∙Strong fundamentals in DFT
∙Excellent communication and interpersonal skills.
∙Excellent Leadership quality to technically mentor and lead a team of DFT engineers.
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