Digital Design & RTL Engineer — High-Speed Automotive SerDes SoCs (3–10 Yrs)

About Texas Instruments

Texas Instruments (TI) is a global semiconductor company designing, manufacturing, and selling analog and embedded processing chips — powering everything from industrial automation to automotive safety systems worldwide.

About the Team — High Speed Data Interface Product Group

The High Speed Data Interface product group focuses on the development of differentiated high-speed SerDes SoCs targeted for automotive and industrial markets . There are two primary focus areas — Ethernet PHY and FPD-Link .

Ethernet PHY Group: A large number of applications — like in-vehicle driver alertness monitors, steering, or accelerator control in automotive and robotic applications — require an Ethernet interface. The ubiquity of Ethernet-enabled devices allows customers to simplify connecting large numbers of devices in automotive and robotic environments. Customers expect robust performance in the presence of interference and ESD events, along with processing offload capabilities. The low-cost migration from CAN to Ethernet presents unique challenges requiring interdisciplinary skills with aggressive cost and power targets.

FPD-Link Group: The proprietary FPD-Link interface addresses multi-gigabit (up to 20 Gbps) automotive and industrial sensor and display markets. Constant increase in density of electronic sensing and display content is pushing data rate (>20 Gbps) and BER performance requirements higher. Automotive functional safety requirements demand robust performance at these high data rates under challenging environments while maintaining low power consumption.

The Broader Mission: As part of this product group, you will be engaged in designing solutions spanning Analog, Digital, and Signal Processing domains to mitigate impairments such as high channel loss, ESD strikes, and narrowband interference. The team implements high-performance equalization circuits (CTLE, FFE, DFE), high-speed converters (DAC, ADC), high-speed digital front-ends, signal processing algorithms, embedded microcontrollers, and high-speed interfaces for camera and display systems. The team has successfully achieved several differentiated innovations through collaborative cross-domain optimization.

The entire product lifecycle — from product specification to customer and application support — is owned by the product group in Bangalore , giving each team member tremendous learning opportunity and enhanced scope to influence the global success of the product . We are looking for passionate, creative, and self-driven engineers who challenge traditional techniques and come up with innovative solutions to make a difference.

Role Overview

As a Digital Design & RTL Engineer , you will architect and implement the high-speed digital subsystems that form the backbone of next-generation automotive and industrial SerDes SoCs. From digital front-end receivers to embedded microcontroller cores and high-speed camera/display interfaces, your work will directly determine the functionality, performance, and reliability of TI's most advanced connectivity products.

Key Responsibilities

• Design and implement high-speed digital front-end architectures for SerDes receivers and transmitters, including CDR logic, phase interpolators, and digital adaptation engines
• Develop embedded microcontroller subsystems integrated within the SoC fabric — including memory maps, interrupt controllers, boot sequences, and peripheral interfaces
• Implement and optimize high-speed camera and display interfaces (FPD-Link, MIPI CSI/DSI, and proprietary protocols) for automotive sensor and display applications
• Write clean, synthesizable, and well-documented RTL in Verilog / SystemVerilog following automotive-grade coding guidelines
• Collaborate with verification teams to ensure functional correctness, coverage closure, and protocol compliance
• Partner with physical design teams for timing-aware RTL coding, synthesis optimization, and DFT insertion
• Drive design reviews , microarchitecture documentation, and cross-functional technical discussions
• Contribute to innovation through novel digital architectures targeting power, area, and performance optimization

✅ Required Qualifications

• Education: B.Tech / M.Tech in Electronics / VLSI / Computer Engineering
• Experience: 3–10 years of digital design and RTL development experience
• Strong skills in Verilog / SystemVerilog for synthesizable RTL design
• Experience with high-speed digital design for SerDes, camera, or display protocols
• Proficiency with synthesis tools (Synopsys Design Compiler, Cadence Genus) and STA
• Understanding of clock domain crossing (CDC) techniques and async design methodologies
• Knowledge of DFT methodologies (scan insertion, BIST) for automotive-grade test coverage

Preferred / Good-to-Have Skills

• Hands-on experience with SerDes digital architectures (CDR, SERDES PMA/PCS)
• Exposure to MIPI, FPD-Link, Ethernet MAC/PHY protocol implementations
• Background in low-power digital design (clock gating, power domains, retention)
• Familiarity with automotive functional safety requirements (ISO 26262, ASIL-B/D)
• Experience with formal verification sign-off for digital RTL

What Makes This Role Unique

️ Advanced Architecture Design digital systems at the heart of 20 Gbps SerDes SoCs

🚗 Domain Impact Your RTL powers automotive safety and robotics systems globally

Full Lifecycle Ownership Spec → Silicon → Customer — all from Bangalore

🤝 Cross-Domain Collaboration Work alongside analog, DSP, firmware & systems engineers

Global Influence Shape products deployed in automotive platforms worldwide

Career Growth High-visibility role with direct impact on product success