Senior DFT Engineer - SOC Test Architect

IMEC Inc. seeks a seasoned DFT Engineer to design and implement advanced DFT solutions for SOCs, coordinating with PD and test teams.

You will apply boundary scan, MBIST, and ATPG techniques for complex 5nm+ designs, ensure fault coverage, and drive post-silicon debug efforts. The role requires deep knowledge of IEEE IJTAG standards, DFT flows, and hands-on use of Tessent and Cadence tools, with TCL scripting to automate tasks.